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Question: Can I use the disable pin of the amplifier to save power without affecting performance?
In the Internet of Things era, battery-powered applications are booming. This article will show that we do not have to choose between saving power and accuracy.
Some op amps have a disable pin that, when used properly, can save up to 99% power without affecting accuracy. The disabled pin is mainly used for static operation (standby mode). In this mode, all ICs switch to a low power state and do not need to use the device to process the signal. This reduces power consumption by several orders of magnitude.
If the op amp needs to be used as a buffer amplifier for the ADC, as shown in Figure 1, it must be in operation to perform its function. However, if the amplifier is switched to shutdown mode by disabling the pin, low power consumption can still be maintained. In general, the shutdown mode can be used as long as the ADC does not need to read any new values ​​into its sample and hold blocks.
Figure 1. Typical schematic of an ADC input stage with ADC driver and reference buffer.
The easiest way to achieve this function is by converting the start command. In a standard ADC, the input (sample and hold) capacitor is first charged to the value to be measured. This is done before the signal is sent to the ADC for conversion. The input capacitor is then isolated and connected to the input of the converter stage, ie the conversion begins. The conversion is completed and the completed signal is set, depending on the converter type. Now the real question is: When must an op amp be in operation? The amplifier must be operating long enough before the conversion start signal to ensure that the internal input capacitance gets the same value as the signal under test. The length of time depends on the size of the input capacitor, the size of the voltage to be measured, and the rate at which the op amp drives the capacitive load.
The data sheet for the ADC (AD7980) gives a series 400 impedance with an input capacitance of 30 pF. However, operational amplifiers are not that simple. The capacitive load listed in the parameter table is 15pF, but it may also be higher. See the corresponding plot (Figure 2). Also consider the case of using a low-pass filter at 2.7nF and 20 o'clock.
Figure 2. Frequency response of the ADA4807.
This graph shows that the module can drive high enough capacitive loads. When disabled, the amplifier needs approximately 500ns to reach the full-scale output level. In this case, the maximum value is 5V or 4.096V.
For the sake of safety, we assume that the amplifier turns on 750ns before the conversion starts. Compare the estimated data from 1kSPS to 1MSPS.
At 1kSPS, it is possible to save power consumption of 99.83% (total power consumption of 0.02mW), saving 92.41% at 1MSPS (total power consumption of 10.75mW). This is just the power savings of the ADC driver; the reference buffer also saves power.
This example aims to illustrate the capabilities of modern devices. With a minimum sampling time of 500ns, the SINAD deviation is less than 0.5dB. For drivers, you also need to focus on faster related devices and use them flexibly. We only considered the application used as a buffer (gain = 1). For inverting or other amplifiers, the power savings can also vary from case to case. Need to be further analyzed by measurement.
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